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ASIC Design Verification Engineer at ACL Digital

Pay by year, the work locations, and the prevailing-wage level breakdown.

What does ACL Digital pay a ASIC Design Verification Engineer on an H-1B?

$121k ACL Digital has filed 14 H-1B labor condition applications for the role of ASIC Design Verification Engineer with the U.S. Department of Labor between FY2017 and FY2019 at a median base salary of $121k. Most of those filings fall between $120k and $125k. Base salary is the wage stated on the filing, not total compensation.

H-1B LCA filings
14
Median base salary
$121k
Middle 50%
$120k to $125k

Filings and pay by year

ASIC Design Verification Engineer at ACL Digital, by fiscal year

Show the numbers behind this chart
ACL Digital ASIC Design Verification Engineer H-1B filings and median base salary by fiscal year
Fiscal yearFilingsMedian base salary
FY20191$141k
FY20188$122k
FY20175$120k

Where this work is

Work locations named on the filings, most common first

LocationFilingsMedian base salary
San Diego, CA4$120k
Santa Clara, CA4$116k
Mountain View, CA3$125k
San Jose, CA2$113k
Sunnyvale, CA1$141k

Prevailing-wage level

The experience level DOL assigns the role, I (entry) to IV (expert)

LevelFilingsMedian base salary
Level I3$110k
Level II9$122k
Level III2$141k

Other roles ACL Digital sponsors

See ACL Digital's full H-1B and green-card profile