FPGA Silicon Design Verification Engineer, H-1B salary
What 9 H-1B filings report for “FPGA Silicon Design Verification Engineer” (LCA, FY2017–2026): pay percentiles, the states paying most, and who files.
What is the H-1B salary for an FPGA Silicon Design Verification Engineer?
$152k median H-1B base salary for an FPGA Silicon Design Verification Engineer, typically $115k to $216k, across 9 H-1B LCA filings with the U.S. Department of Labor (FY2025 to FY2026).
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Entry-ish (p10)
$115k
10th percentile
Middle 50% (p25–p75)
$136k–$183k
interquartile range
Median base salary
$151,895
9 filings
Top (p90)
$216k
90th percentile
p10 $115k
median $152k
p90 $216k
Median pay & filings over time · H-1B · FY2017–2026*
Top-paying states
Median for this title · ≥20 filings
Not enough state-level data.
Top employers for this title
Most H-1B filings · with each employer’s median for the role
- 1Altera9 filings$152k
Figures are for the exact title “FPGA Silicon Design Verification Engineer”; for a rare title we widen to the closest related titles (flagged above when that happens). To benchmark a specific offer by employer and state, use Salary Check.