Lead ASIC Design Verification Engineer, H-1B salary
What 6 H-1B filings report for “Lead ASIC Design Verification Engineer” (LCA, FY2017–2026): pay percentiles, the states paying most, and who files.
What is the H-1B salary for a Lead ASIC Design Verification Engineer?
$130k median H-1B base salary for a Lead ASIC Design Verification Engineer, typically $110k to $143k, across 6 H-1B LCA filings with the U.S. Department of Labor (FY2017 to FY2023).
No exact matches for “Lead ASIC Design Verification Engineer”, showing the closest job titles.
Median pay & filings over time · H-1B · FY2017–2026*
Top-paying states
Median for this title · ≥20 filings
Not enough state-level data.
Top employers for this title
Most H-1B filings · with each employer’s median for the role
Related titles in this family
6 filings carry “Lead ASIC Design Verification Engineer” in the title, across 2 variants. Pay differs by variant, so each is listed with its own median.
- 1Lead ASIC Design Verification Engineer (ASIC Dv Engr)3 filings$110k
Figures are for the exact title “Lead ASIC Design Verification Engineer”; for a rare title we widen to the closest related titles (flagged above when that happens). To benchmark a specific offer by employer and state, use Salary Check.