Senior ASIC Design Verification Engineer, H-1B salary
What 7 H-1B filings report for “Senior ASIC Design Verification Engineer” (LCA, FY2017–2026): pay percentiles, the states paying most, and who files.
What is the H-1B salary for a Senior ASIC Design Verification Engineer?
$164k median H-1B base salary for a Senior ASIC Design Verification Engineer, typically $141k to $192k, across 7 H-1B LCA filings with the U.S. Department of Labor (FY2018 to FY2024).
Median pay & filings over time · H-1B · FY2017–2026*
Top-paying states
Median for this title · ≥20 filings
Not enough state-level data.
Which companies sponsor H-1B for a Senior ASIC Design Verification Engineer?
The employers that file the most H-1B labor condition applications for Senior ASIC Design Verification Engineer roles are Micron and Palo Alto Networks, based on their U.S. Department of Labor (LCA) filings. Open any for its full Senior ASIC Design Verification Engineer filing history, pay, and open roles.
Top employers for this title
Most H-1B filings · with each employer’s median for the role
- 1Micron2 filings$175k
- 2Palo Alto Networks2 filings$169k
- 3Capgemini1 filings$134k
- 4Nvidia1 filings$200k
- 5PerfectVIPs1 filings$145k
Figures are for the exact title “Senior ASIC Design Verification Engineer”; for a rare title we widen to the closest related titles (flagged above when that happens). To benchmark a specific offer by employer and state, use Salary Check.